To write effective code for the 8051, you must first understand its internal landscape. The programming model is defined by its registers, memory organization, and the operation of the stack. These components are the fundamental building blocks you will manipulate with assembly language. This section details the function of each core register and explains how memory is structured and used.

4.1 Core Registers

Registers are temporary storage locations inside the CPU that hold data or addresses. The 8051 has several key registers you will use constantly.

• Accumulator (Register A): This is the workhorse register of the 8051. It is used for all arithmetic and logic operations. The result of most calculations (addition, multiplication, etc.) is stored in the Accumulator.
• “R” Registers (R0-R7): This is a set of eight auxiliary or temporary storage registers (R0, R1, R2, R3, R4, R5, R6, and R7). They are used as “helper” registers to hold values temporarily during calculations.
• “B” Register: This register is primarily used for two specific instructions: MUL AB (multiply) and DIV AB (divide). For these operations, one number is placed in the Accumulator (A) and the other in the B register. It can also be used as a general-purpose temporary storage register.
• Data Pointer (DPTR): The DPTR is the only user-accessible 16-bit register in the 8051. Its primary purpose is to hold a 16-bit address for pointing to external memory. It is often used to store 2-byte values.
• Program Counter (PC): This 16-bit register holds the address of the next instruction to be executed. The PC is automatically incremented after each instruction is fetched. Jump, branch, and call instructions work by loading a new address directly into the PC. Upon reset, the PC is initialized to 0000H.
• Stack Pointer (SP): This is an 8-bit register that points to the top of the stack. When a value is pushed onto the stack, the SP is incremented first, and then the value is stored. When a value is popped, the value is retrieved, and then the SP is decremented.

4.2 The Program Status Word (PSW) Register

The Program Status Word (PSW) is an 8-bit flag register that reflects the current status of the CPU. The bits in this register are set or cleared by hardware after certain instructions are executed.

The RS0 and RS1 bits determine which block of RAM is used for the R0-R7 registers.

4.3 Memory Organization

The 8051 has 128 bytes of internal RAM, with addresses from 00H to 7FH. This RAM is divided into three distinct sections.

RAM Allocation

• 32 bytes (00H – 1FH): Reserved for the four register banks and the stack.
• 16 bytes (20H – 2FH): Designated as bit-addressable memory, allowing individual bits to be set or cleared.
• 80 bytes (30H – 7FH): A general-purpose “scratch pad” area for read/write data storage.

Register Banks

The first 32 bytes of RAM are divided into four register banks (Bank 0, Bank 1, Bank 2, Bank 3). Each bank contains eight registers, named R0 through R7. Only one bank can be active at a time. Bank 0 is the default upon power-up. You can switch between banks by setting the RS1 and RS0 bits in the PSW register.

The Stack

The stack is a section of RAM used for temporary data storage, particularly for saving return addresses during subroutine calls.

• The Stack Pointer (SP) is an 8-bit register that always points to the last used location on the stack.
• The PUSH operation first increments the SP, then stores the data at the new address.
• The POP operation first retrieves the data from the location pointed to by the SP, then decrements the SP.
• On startup, the 8051 initializes the SP to 07H. This means the first value pushed onto the stack will be stored at RAM location 08H.

Understanding this internal structure is the first step toward commanding the 8051. The next step is learning the language used to issue those commands: Assembly Language.