5.1 Addressing Modes

Addressing modes define how the CPU addresses memory locations for instructions.

1. Immediate Addressing: The data is provided directly in the instruction (e.g., MOV A, #6AH).
2. Direct Addressing: The 8-bit address of the data is given in the instruction (e.g., MOV A, 04H). This mode can access internal RAM and SFRs.
3. Register Direct Addressing: The source operand is one of the R0-R7 registers (e.g., MOV A, R4). The active register bank is determined by the PSW.
4. Register Indirect Addressing: The address of the data is stored in R0 or R1, which is then used as a pointer (e.g., MOV A, @R0).
5. Indexed Addressing: An effective address is calculated by adding the accumulator to a 16-bit base register (either DPTR or PC). Used for look-up tables (e.g., MOVC A, @A+DPTR).

5.2 Instruction Set: Control Transfer

Control transfer instructions alter the sequential flow of a program.

• Loops: The DJNZ reg, label instruction decrements a register and jumps to a label if the result is not zero, facilitating loops up to 256 iterations.
• Conditional Jumps: These are short jumps (within -128 to +127 bytes) based on the state of flags or registers (e.g., JZ, JNZ, JC, JNC, JB, JNB).
• Unconditional Jumps:
  • SJMP (Short Jump): A 2-byte instruction with a relative address range of -128 to +127 bytes.
  • LJMP (Long Jump): A 3-byte instruction that can jump to any location within the 64KB address space.
• Call Instructions: Used to call subroutines. The return address is pushed onto the stack.
  • ACALL (Absolute Call): A 2-byte call within a 2KB address range.
  • LCALL (Long Call): A 3-byte call to any location within the 64KB address space.