The I/O ports are the 8051’s primary interface to external devices, enabling it to read sensor data, control actuators, and communicate with other systems. The standard 8051 provides four 8-bit ports—P0, P1, P2, and P3—for a total of 32 I/O lines.

5.2 General Port Configuration

Upon a system RESET, all 32 I/O pins are configured as inputs. To use a port pin as an output, a 0 must be written to the corresponding bit in the port’s latch. To reconfigure a pin as an input, a 1 must be written to the bit, which causes the pin to float at a high-impedance state, allowing it to be driven by an external signal.

5.3 Port-Specific Functions

While all ports can be used for general-purpose I/O, three have dual-role capabilities that are automatically invoked when the system requires access to external memory or uses special on-chip peripherals.

5.3.1 Port 0 (P0)

• Pins: 32-39
• Configuration: Port 0 is an open-drain port. When used for general I/O, it requires external pull-up resistors to source a logic high level.
• Dual Role: When accessing external memory, Port 0 is time-multiplexed to serve as both the lower 8 bits of the address bus (A0-A7) and the 8-bit data bus (D0-D7). The ALE (Address Latch Enable) signal is used to demultiplex these signals by latching the address at the beginning of a memory cycle.

5.3.2 Port 1 (P1)

• Pins: 1-8
• Configuration: Port 1 is a dedicated general-purpose I/O port with internal pull-up resistors, eliminating the need for external pull-ups in typical applications.

5.3.3 Port 2 (P2)

• Pins: 21-28
• Configuration: Port 2 serves as a general-purpose I/O port and includes internal pull-up resistors.
• Dual Role: When the system accesses external memory, Port 2 provides the high byte of the 16-bit address bus (A8-A15). During external memory access, its function as a general-purpose I/O port is unavailable.

5.3.4 Port 3 (P3)

• Pins: 10-17
• Configuration: Port 3 is a general-purpose I/O port with internal pull-ups, where each pin has an alternate function related to the 8051’s on-chip peripherals.

5.4 Bit Addressability

A powerful feature of the 8051’s I/O ports is their bit addressability, which allows a programmer to modify a single I/O pin without affecting the other seven pins on the same port. The syntax for this is SETB X.Y, where X is the port number (0-3) and Y is the bit number (0-7).

Data is moved to and from these ports using various instructions, which are governed by the microcontroller’s addressing modes.