Addressing modes define the methods by which the CPU accesses operands for a given instruction. The 8051 supports five distinct addressing modes, each offering different trade-offs in performance, code size, and programming flexibility.

6.2 Mode Descriptions

6.2.1 Immediate Addressing

In this mode, the operand is a constant value that is part of the instruction itself, supplied immediately following the opcode in program memory. The # symbol signifies immediate data.

• Example: MOV A, #6AH

6.2.2 Direct Addressing

This mode uses an 8-bit address to specify the location of the operand within the internal RAM address space (00H-7FH) or the Special Function Registers (80H-FFH).

• Example: MOV A, 04H

6.2.3 Register Direct Addressing

In this mode, the instruction specifies a register (R0-R7) from the currently selected bank which contains the operand.

• Example: MOV A, R4

6.2.4 Register Indirect Addressing

This mode uses a register (only R0 or R1) to hold the address of the operand. The @ symbol indicates that the register contains a pointer to the data, not the data itself.

• Example: MOV A, @R0

6.2.5 Indexed Addressing

In indexed addressing, the effective address of the operand is calculated by summing the value of a base register (either the Data Pointer DPTR or the Program Counter PC) and the value of the Accumulator (A). This mode is primarily used for reading look-up tables from program memory.

• Example: MOVC A, @A+DPTR

The instruction set of the 8051 is designed to effectively utilize these addressing modes.