The integrity and comparability of ESD test results are critically dependent on the use of standardized and properly configured test equipment. Repeatable outcomes demand that the test apparatus consistently produces the specified electrical discharge waveforms. This section details the required components and the reference circuit configuration that form the basis of a compliant MM test system.

Core Equipment Requirements

The following equipment, meeting the specified technical parameters, is mandatory for performing this test method:

• ESD Pulse Simulator and Device Under Test (DUT) Socket: This is the primary test fixture, responsible for generating and delivering the ESD pulse to the device. It must be functionally equivalent to the reference circuit described below.
• Oscilloscope: The measurement system must have a minimum single-shot bandwidth of 350 MHz and a minimum visual writing speed of 4 cm/ns.
• Current Probe: A current probe, comprising a transformer and cable with a nominal length of 1 meter, with a minimum pulse-current bandwidth of 350 MHz is required. A probe with a 1 GHz bandwidth and a maximum pulse-current rating of 12 amperes is recommended for enhanced measurement accuracy.
• Evaluation Loads: Two specific loads are required for waveform verification and system calibration:
  • An 18 AWG tinned copper wire is used as a short-circuit load for waveform verification.
  • A 500 ohm (+/- 1%), 1000 volt, low inductance resistor is used for initial system checkout and periodic recalibration.

Typical Equivalent MM ESD Circuit

The test simulator must be functionally equivalent to the circuit detailed below.

• C1: A high-voltage capacitor with a value of 200 pF +/- 10%.
• R1: A charging resistor with a value between 10k ohm and 10M ohm.
• R2: A 500 ohm low inductance resistor used as a verification load during initial equipment qualification.
• S1 & S2: High-voltage switches controlling the charge and discharge paths.
• DUT Socket: The fixture holding the device, providing connection points designated as Terminal A and Terminal B.

Circuit Implementation Notes

The practical implementation of the test circuit must account for several critical factors to ensure valid test results:

1. The performance of any simulator is inherently influenced by parasitic capacitance and inductance. These parasitic elements must be minimized and controlled to meet the waveform specifications.
2. The test setup design must include precautions to avoid recharge transients and multiple pulses, which could subject the DUT to unintended stress.
3. Switch S2 must be closed 10 to 100 milliseconds after the primary pulse delivery. This action discharges the DUT, ensuring it is not inadvertently left in a charged state, which could affect subsequent measurements.
4. Stacking of DUT socket adaptors (piggybacking) is prohibited unless the resulting waveforms are verified to meet the specifications in Table 1. This practice can introduce parasitic inductance and capacitance, which may distort the waveform and invalidate test results.
5. To achieve dual polarity stressing, the high-voltage pulse generator must be capable of generating both positive and negative polarities. Reversal of the Terminal A and Terminal B connections is not a permitted method for changing pulse polarity.

The physical apparatus described here must be rigorously calibrated and verified to ensure it produces the precise electrical waveforms required for a compliant test.