5.0 Device Stressing and Classification Procedure
After the test apparatus has been fully qualified, this procedure provides the methodical framework for applying controlled ESD pulses to a Device Under Test (DUT). The goal is to systematically determine the device’s ESD sensitivity threshold by observing its performance after exposure to predefined stress levels.
Pre-Test Device Conditions
Before commencing ESD stressing, the following conditions must be met:
- The devices selected for testing must have completed all normal manufacturing operations.
- Prior to ESD exposure, baseline DC parametric and functional testing must be performed on all test devices at room temperature. This data establishes the pre-stress performance benchmark against which post-stress results will be compared.
Stress Application
The stress testing protocol shall be conducted as follows:
- Sample Size: A sample of 3 devices is to be stressed at each voltage level. It is permitted to use a separate sample of 3 devices for each pin combination specified in Table 2. It is also permitted to use the same sample of 3 devices at the next higher voltage stress level if all parts pass the failure criteria at the current level.
- Voltage Steps: Testing should begin at the lowest voltage level specified in Table 1. The voltage is then increased in steps for subsequent tests. Finer voltage steps may be used to determine a more precise failure threshold.
- Pulse Application: Each specified pin combination shall receive 1 positive and 1 negative pulse. A minimum delay of 1 second is required between consecutive pulses.
Table 2: Pin Combinations for Integrated Circuits
The ESD pulses must be applied to the DUT using the comprehensive set of pin combinations detailed below. All pins that are functionally the same power or ground group (e.g., VCC1, VCC2, GND1, GND2) are to be connected together and treated as a single pin for the purpose of these tests. This ensures that all relevant internal structures are adequately stressed.
| Pin Combination | Connect Individually to Terminal A | Connect to Terminal B (Ground) | Floating Pins (unconnected) |
| 1 | All pins one at a time, except the pin(s) connected to Terminal B | First power pin(s) | All pins except PUT* and First power pin(s) |
| 2 | All pins one at a time, except the pin(s) connected to Terminal B | Second power pin(s) | All pins except PUT and second power pin(s) |
| 3 | All pins one at a time, except the pin(s) connected to Terminal B | Nth power pin(s) | All pins except PUT and Nth power pin(s) |
| 4 | Each Non-supply pin, one at a time | All other Non-supply pins collectively, except PUT | All power pins |
*PUT – Pin under test.
Once the stress application is complete, the final step is to analyze the test results and assign a formal classification based on objective failure criteria.