Equipment qualification and routine waveform verification are foundational quality control steps. This process validates that the ESD simulator produces the precise electrical stress defined by the A115-A standard. This ensures that test results are accurate and reflect the DUT’s true sensitivity, rather than being an artifact of out-of-spec equipment.

5.1 Initial Qualification and Recalibration Schedule

Full equipment qualification is mandatory and must be performed under the following conditions:

• Upon initial acceptance of the test system.
• Whenever equipment repairs are made that may affect the waveform.
• At a minimum interval of every 12 months.

The qualification process involves verifying the simulator’s output waveform against the requirements specified in Table 1 (see Appendix A) at all voltage levels, using both the shorting wire and the 500 ohm resistor loads. Additionally, a machine repeatability check must be performed by generating a minimum of 5 consecutive positive and 5 consecutive negative pulses at a user-selected voltage level to verify consistent waveform generation.

5.2 Procedure: Identifying the Worst-Case Pin Pair for Verification

To ensure the most accurate waveform verification, the measurement must be taken across a pin combination that represents a known condition of the test socket’s parasitics.

The following procedure shall be used to identify a reference pin pair on a given DUT socket:

1. Select the test socket to be used for testing.
2. Identify the socket pin that has the shortest wiring path from the pulse generating circuit. Connect this pin to Terminal B (Ground).
3. From the remaining pins, select one and connect it to Terminal A. This pair constitutes the worst-case (i.e., lowest inductance) pin pair.
4. Attach a shorting wire between the selected pins for Terminal A and Terminal B, ensuring the wire is as close to the socket body as practicable.
5. Place the current probe around the shorting wire.

An alternative search for the worst-case pin pair may be performed to identify the pin combination with a waveform closest to the specification limits. This is accomplished by connecting the pin with the shortest path to Terminal B and then connecting the pin with the longest wiring path to Terminal A. This combination will produce the waveform with the highest parasitic inductance and is also acceptable for verification.

NOTE: If a specific test socket or test board has already been characterized and its worst-case pin combination has been documented, that combination is acceptable for use in subsequent waveform verifications.

5.3 Procedure: Pre-Test Waveform Verification

A streamlined waveform check must be performed more frequently to ensure the system remains in compliance during routine operation. This verification is required:

• At the beginning of each work shift.
• Any time a different DUT socket or test board is installed on the simulator.

If the measured waveform does not meet the requirements of Table 1 (Appendix A) at the 400 volt level, all testing must be halted until the system is serviced and brought back into compliance.

Verification Steps:

1. Install the required DUT socket onto the ESD simulator.
2. Attach a shorting wire between the worst-case pins (as determined in section 5.2). Place the current probe around the shorting wire.
3. Initiate a positive pulse at the 400 volt level. Verify that all measured waveform parameters meet the limits specified in Table 1 (see Appendix A).
4. Initiate a negative pulse at the 400 volt level. Verify that all measured waveform parameters meet the limits specified in Table 1 (see Appendix A).

Once the equipment is verified to be performing to specification, the procedure for testing the actual microcircuit can begin.