3.0 Frame Structure Specification at 6312 kbit/s
The 6312 kbit/s interface serves as the second level in the digital hierarchy, primarily used for multiplexing four 1544 kbit/s streams into a single, higher-capacity signal.
The basic frame characteristics for this interface are a frame length of 789 bits and a frame repetition rate of 8000 Hz.
The last five bits of each frame (bits 785 to 789) are designated as F-bits. These bits are allocated for frame alignment, performance monitoring, and providing a data link, similar to the 1544 kbit/s interface but with a different structure.
Table 6: Allocation of F-bits at 6312 kbit/s
| Frame number | Bit number | ||||
| 785 | 786 | 787 | 788 | 789 | |
| 1 | 1 | 1 | 0 | 0 | m |
| 2 | 1 | 0 | 1 | 0 | 0 |
| 3 | x | x | x | a | m |
| 4 | e₁ | e₂ | e₃ | e₄ | e₅ |
| m | Data link bit | ||||
| a | Remote end alarm bit (1 state = alarm, 0 state = no alarm) | ||||
| eᵢ | CRC-5 check bit (i = 1 to 5) | ||||
| x | Spare bits, to be set at state 1 if not used |
The frame and multiframe alignment signal is 110010100, which is carried on the F-bits in frames 1 and 2, excluding bit m in frame 1.
The Cyclic Redundancy Check (CRC-5) procedure provides error monitoring for the 6312 kbit/s signal. The CRC-5 Message Block (CMB) is a sequence of 3151 serial bits, which starts at bit number 1 of frame number 1 and ends at bit number 784 of frame number 4. The five CRC check bits (e₁ to e₅) occupy the last five bits of frame 4. The generator polynomial for this check is x⁵ + x⁴ + x² + 1.
This specification now proceeds to the widely used 2048 kbit/s interface.